Simulink Subsystems
Unlock Model Clarity & Power: Your Essential Guide to Simulink Subsystems
1. Enabled Subsystems: Execute only when a control signal is true (useful for mode changes or conditional execution).
Port's Datatype:
- Input:
half|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image - Enable:
single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point - Output:
half|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image
2. Triggered Subsystems: Execute only when a specific event (like a rising edge) occurs (great for event-driven logic).
Port's Datatype:
- Input:
half|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image - Trigger:
single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point - Output:
half|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image
3. Function-Call Subsystems: Act like functions that are called by a Stateflow chart or another block (powerful for complex control logic).
Port's Datatype:
- Input:
single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image - Function Call:
A Trigger type of function-call makes the block a Function-Call port block that accepts function-call events. - Output:
single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image
4. Atomic Subsystems: These execute as a single unit and are often used for code generation to create distinct functions.
Port's Datatype:
- Input:
half*|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image - Output:
half*|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image
5. Variant Subsystems: Allow you to switch between different implementations of a subsystem based on conditions, useful for design iterations or different product configurations.
Port's Datatype:
- Input:
half*|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image - Output:
half*|single|double|int8|int16|int32|int64|uint8|uint16|uint32|uint64|Boolean|fixed point|enumerated|bus|image
*** Happy Learning ***

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